Superlattice quantum well infrared detector having exposed layers

ABSTRACT

In at least one embodiment, an infrared (IR) detector is provided. The IR detector comprises a thermal sensing element that includes an absorber that is formed of a superlattice quantum well structure. The superlattice quantum well structure includes a first layer and a second layer, the first layer being arranged to extend in a first plane and the second layer being positioned proximate to the first layer and extending in the first plane. The second layer extending further than the first layer in the first plane such that a portion thereof is exposed for receiving a conductive material to increase electrical conductivity in the detector.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. provisional application Ser. No. 61/391,996 (“the'996 application”) filed on Oct. 11, 2010, which is hereby incorporated by reference in its entirety.

TECHNICAL FIELD

Embodiments described herein generally relate to a superlattice quantum well infrared (IR) detector and a method for forming the same.

BACKGROUND

An IR detector is generally defined as a photodetector that responds to IR radiation. One type of an infrared detector is a thermal based detector. A thermal based detector may be implemented within a camera to generate an image of an object formed on the thermal properties generally associated with such an object. Thermal based detectors are known to include bolometers, microbolometers, pyroelectric, and thermopiles.

A microbolometer changes its electrical resistance based on an amount of radiant energy that is received from an object. Thermopiles include a number of thermocouples that convert thermal energy from the object into electrical energy. Such devices have been incorporated into cameras in one form or another for thermal imaging purposes. The following references may be relevant to the present disclosure: U.S. Pat. Nos. 4,895,790 to Swanson et al., 5,436,476 to Hynecek, 5,550,387 to Elsner et al., 6,060,656 to Dresselhaus, et al., 6,690,014 to Gooch, et al., 7,038,234 to Ghamaty, et al., 7,755,048 to Hsu, and U.S. Patent Publication No. 2011/0168978 to Kochergin.

SUMMARY

In at least one embodiment, an infrared (IR) detector is provided. The IR detector comprises a thermal sensing element that includes an absorber that is formed of a superlattice quantum well structure. The superlattice quantum well structure including a first layer and a second layer, the first layer being arranged to extend in a first plane and the second layer being positioned proximate to the first layer and extending in the first plane. The second layer extending further than the first layer in the first plane such that a portion thereof is exposed for receiving a conductive material to increase electrical conductivity in the detector.

BRIEF DESCRIPTION OF THE DRAWINGS

The embodiments of the present invention are pointed out with particularity in the appended claims. However, other features of the various embodiments will become more apparent and will be best understood by referring to the following detailed description in conjunction with the accompany drawings in which:

FIG. 1 depicts a thermal detector in accordance to one embodiment of the present invention;

FIG. 2 depicts a thermal detector in accordance to another embodiment of the present invention;

FIG. 3 depicts a cross-sectional view of the thermal detector of FIG. 2;

FIG. 4 depicts another cross-sectional view of a thermal detector including only an absorber;

FIG. 5 depicts a cross sectional view of the absorber of the detector in accordance to one embodiment of the present invention;

FIG. 6 depicts a cross sectional view of the first arm and the post of the detector in accordance to one embodiment of the present invention;

FIG. 7 depicts various cross sections of the superlattice quantum well layers of the detector the undergoes a binary mask etch cycle in accordance to one embodiment of the present invention; and

FIG. 8 depicts a method for forming the absorber and the post of the detector in accordance to one embodiment of the present invention.

DETAILED DESCRIPTION

As required, detailed embodiments of the present invention are disclosed herein; however, it is to be understood that the disclosed embodiments are merely exemplary of the invention that may be embodied in various and alternative forms. The figures are not necessarily to scale; some features may be exaggerated or minimized to show details of particular components. Therefore, specific structural and functional details disclosed herein are not to be interpreted as limiting, but merely as a representative basis for teaching one skilled in the art to variously employ the present invention.

Various embodiments as disclosed herein, generally provide for, but not limited to, a plurality of IR detectors that may be positioned in an array of M×N columns for generating an image of a scene. In another embodiment, the plurality of IR detectors may be used to capture (or sense) thermal energy from a light source (or scene) and to provide an electrical output based on the sensed thermal energy for purposes of energy storage. In another embodiment, a single IR detector may be provided for thermal sensing. The IR detector generally includes, among other things, an absorber, a substrate, and/or at least one arm. The absorber and/or the at least one arm may be suspended over the substrate. It is contemplated that the absorber and/or the at least one arm may be include a number of layers of superlattice quantum well thermoelectric based material. Such a construction may enable the absorber and the at least one arm to achieve increased Seebeck effect, low resistivity, and adequate thermal conductivity. These aspects may improve detector performance. The layers of the superlattice quantum well based materials in the absorber and/or the arm may be exposed via a photoresist/etch process to enable increased conductivity with a conducting metal. By fabricating a detector with minimal electrical resistance, high detector sensitivity may be attained.

It is contemplated that the embodiments described herein may be utilized for purposes other than those described and that the challenges that may be noted herein are not intended to be an exhaustive list of challenges that may be overcome by the embodiments of the present invention. Such challenges that may be described herein are noted for illustrative purposes and that all of the challenges that may be overcome by the various embodiments of the present invention are not described for purposes of brevity. Moreover, it is contemplated that the embodiments described herein may provide for any number of results and that those noted are not intended to be an exhaustive list that may be achieved. Such results disclosed herein are noted for illustrative purposes and that all of the results achieved by the embodiments of the present invention are not described for purposes of brevity as well. Furthermore, the examples provided herein are disclosed for illustrative purposes and are not intended to be an exhaustive list of examples that are capable of being implemented and are not intended to limit the scope of the embodiments of the present invention in any manner.

FIG. 1 depicts a thermal detector (or sensor) 10 in accordance to one embodiment of the present invention. The detector 10 may be one of many arranged in an M×N array 33 within a camera 11 that includes a lens 13. The camera 11 is generally configured to capture an image of a scene. Each detector 10 is configured to absorb IR radiation from a scene and to change its voltage potential based on the amount of energy received from the scene. A readout integrated circuit (ROIC) 19 (or readout circuit) is positioned below each detector 10. The ROIC 19 may electrically output the voltage potential for each detector 10. Each detector 10 may be micro-machined on top of the ROIC 19. The embodiments disclosed herein may be incorporated in a detector as set forth in co-pending application Serial No. PCT/US2010/028293 (“the '293 application”), filed on Mar. 23, 2010. The detector 10 is generally arranged as a micro-bridge. The detector 10 may be formed as a thermopile.

While the detector 10 as noted above may be used to capture an image of a scene in a camera, it is further contemplated that the detector 10 may be used to sense thermal energy from a light source (or scene), such as thermal energy received directly or indirectly from the sun. The detector 10 provides a voltage output in response to the thermal energy for providing electrical energy to power another device or for storing electrical energy on a storage device such as a battery or other suitable mechanism.

The detector 10 includes an absorber 12, a first arm 14, a second arm 15, and a substrate 16. The absorber 12, the first arm 14, and the second arm 15 may comprise thermoelectric materials and be formed with superlattice quantum well materials which will be described in more detail below. The substrate 16 may comprise, but not limited to, a monocrystalline silicon wafer or a silicon wafer. The substrate 16 may be connected to the ROIC 19 (and the substrate 16). The absorber 12, the first arm 14, and the second arm 15 are generally suspended over the ROIC 19. The first arm 14 is positioned next to the absorber 12 and may extend, if desired (attached or unattached) along a first side 18 of the absorber 12 and terminate at a terminal end 20. A post 22 is coupled to the terminal end 20 of the first arm 14.

An interconnect pad 24 of the ROIC 19 receives the post 22. The post 22 provides an electrical connection from the absorber 12 to the ROIC 19. In a similar manner, the second arm 15 is positioned next to the absorber 12 and may extend, if desired (attached or unattached) along a second side 26 of the absorber 12 and terminate at a terminal end 28. A post 30 is coupled to the terminal end 28 of the second arm 16. An input pad 32 of the ROIC 19 receives the post 30. The post 30 provides an electrical connection from the absorber 12 to the ROIC 19. In general, the posts 22 and 30 cooperate with one another to support the absorber 12, the first arm 14, and the second arm 15 above the substrate 16 (e.g., suspend the absorber 12, the first arm 14, and the second arm 15 above the substrate 16).

The absorber 12 is generally configured to receive (or absorb) IR radiation from a scene and to change temperature in response thereto. The detector 10 may change its voltage potential based on the amount of radiation received from the scene. A reflector 17 is positioned between the absorber 12 and the ROIC 19. The reflector 17 may enhance the ability for the absorber 12 to absorb the IR radiation. The first arm 14 and the second arm 15 may be horizontally displaced from the absorber 12 to thermally isolate the absorber 12. It may be desirable to reduce thermal conduction to increase detector 10 performance. In addition, the absorber 12, first arm 14, and the second arm 15 may be vertically displaced from the substrate 16 and define an isolation gap 34 (or cavity) therebetween for thermally isolating one detector from additional detectors positioned within the array.

The detector 10 may comprise P-type materials on one side and N-type materials on another side. For example, the absorber 12 may be considered to include a first portion 36, a second portion 38, and an active region 40. The first arm 14 and the first portion 36 may be constructed from P-type materials. The second arm 15 and the second portion 38 may be constructed from N-type materials. The active region 40 includes electrically conductive material and electrically couples the P-type based elements (first arm 14 and the first portion 36) to the N-type based elements (second arm 15 and the second portion 38).

FIG. 2 depicts a thermal detector 10′ in accordance to another embodiment of the present invention. The detector 10′ may be one of many arranged in an M×N array 18 and used in connection with a camera or with a thermal detection apparatus that captures IR for purposes of producing an output voltage that is stored on an energy storage device such as a battery. The detector 10′ is generally similar to the detector 10 of FIG. 1, but is surface-micro-machined. The thermal detector 10′ may also be a thermopile.

The detector 10′ is configured to absorb IR radiation from a scene and to change a voltage potential thereof based on amount of energy received from the scene. An electrical connection 21 is formed on each side of the detector 10′ for providing an electrical output therefrom to a readout circuit (not shown). The detector 10′ may also be incorporated as a detector as set forth in the '293 application.

The detector 10′ includes the absorber, first arm 14, the second arm 15 and the substrate 16 (see FIG. 3 for substrate 16). The absorber 12, the first arm 14 and the second arm 15 may comprise layers of superlattice quantum well materials, which will also be described in more detail below. The substrate 16 may comprise, but not limited to, a monocrystalline silicon wafer or silicon wafer. The absorber 12, the first arm 14 and the second arm 15 are generally suspended over a cavity 25 (or positioned over the cavity 25) (see FIG. 3). In a similar manner to that described above, the first arm 14 may extend, if desired (attached or unattached), along the first side 18 of the absorber 12 and reach the electrical connection 21. The second arm 16 may extend, if desired (attached or unattached), along the second side 26 of the absorber 12 and reach the electrical connection 21. FIG. 3 depicts a cross-sectional view of the detector 10′ of FIG. 2.

FIG. 4 depicts a thermal detector 10″ in accordance to another embodiment of the present invention. The detector 10″ may also be a thermopile. The detector 10″ generally includes the absorber 12 and may be positioned as a single detector for a thermal sensing application. The detector 10″ may be bulk micro-machined. In this configuration, arms are not present. The absorber 12 may be formed with layers of superlattice quantum well materials. The electrical connection 21 is formed on each side of the absorber 12 for providing an electrical output from the detector 10″. The absorber 12 is generally suspended over the cavity 25. The detectors (10, 10′ and/or 10″) as previously referred to, will hereafter be designated as “10.”

The embodiments described herein recognize, inter alia, that the absorber 12 and/or the arms 14, 15 as used in connection with an IR sensing device may be constructed with layers of superlattice quantum well thermoelectric materials that may enable the detector 10 to realize adequate detector performance characteristics. Moreover, the embodiments disclosed herein contemplate encapsulating the superlattice quantum well materials of the absorber 12 and/or the arms 14, 15 with silicon nitride or silicon dioxide. The encapsulation of the absorber 12 and/or the arms 14, 15 with the silicon based materials may compensate or equalize stress that is induced during the deposition of the superlattice quantum well materials and increase the mechanical strength of the detector 10 while portions of the detector 10 are suspended over the ROIC 16. By increasing the mechanical strength of the detector 10 and by stress compensating the detector 10, warping or buckling of the detector 10 may be minimized or eliminated altogether. The embodiments further recognize that the absorber 12, and/or the first and second arms 14, 15 of the detector 10 may be constructed from superlattice quantum well thermoelectric materials (e.g., silicon (e.g., a barrier material) and silicon germanium (Si/Si_(x)Ge_(1-x)) (e.g., a conductive material) where x may be an integer or a non-integer). The first arm 14 and the first portion 36 may be formed of a p-type superlattice quantum well thermoelectric material. The second arm 15 and the second portion 38 may be formed of an n-type superlattice quantum well material.

By utilizing superlattice quantum well thermopile that includes the absorber 12 and/or arms 14, 15, such a condition prevents thermal loss from the absorber 12 to the arms 14, 15 and/or to any other devices positioned proximate to the absorber 12, thereby thermally isolating the absorber 12 from a surrounding device. When IR from a scene heats the absorber 12, the detector 10 generates an output voltage that is proportional to the temperature difference between the absorber 12 and the substrate 16. Accordingly, if the absorber 12 was formed of material containing a high thermal conduction, detector performance may be adversely affected due to the leakage of thermal energy from the absorber 12. Because the superlattice quantum well material provides a low thermal conductivity, adequate thermal isolation at the absorber 12 may be achieved, thereby improving detector performance. In addition, superlattice quantum well materials also provide for a high Seebeck coefficient and high electrical conductivity which enables the detector 10 to provide an output voltage with a high signal-to-noise ratio which provides for a high fidelity representation of the amount of IR radiation sensed by absorber 12. Generally, the detector 10 may not provide for a current flow. However, in some embodiments the detector 10 is capable of providing a flow of current in the milliamp range.

A detector that includes a superlattice quantum well structure and further includes encapsulating such a superlattice quantum well structure with layers of silicon nitride or silicon dioxide to stress compensate the same is disclosed in co-pending application Serial No. PCT/US11/55220, entitled “SUPERLATTICE QUANTUM WELL INFRARED DETECTOR” (the “220 application”), filed on Oct. 7, 2011, which also claims priority to the '996 application, and is hereby incorporated by reference in its entirety.

The layers of superlattice quantum well material that form the absorber 12 and/or the arms 14, 15 are generally exposed to receive an electrical conductive material to enable an increase in conductivity (e.g., reduce electrical resistance) in the detector 10. This condition will be discussed in more detail below.

FIG. 5 depicts a cross sectional view of the absorber 12 for the detector 10 in accordance to one embodiment of the present invention. The absorber 12 as shown in FIG. 5 may be in a suspended state with respect to the substrate 16 (see FIGS. 1 and 3-4 for substrate 16). The detector 10 includes a first plurality of alternating layers 42 positioned on one side of the active region 40 and a second plurality of alternating layers 44 positioned on another side of the active region 40. The first and the second plurality of alternating layers 42, 44 each comprise superlattice quantum well materials such as silicon and silicon germanium. On the first side 36 of the absorber 12, the plurality of silicon layers (or barrier layers) are non-conductive and the plurality of silicon germanium layers (or conductive layers) are each p-type doped. On the second side 38 of the absorber 12, the plurality of silicon layers (or barrier layers) are non-conductive and the plurality of silicon germanium layers (or conductive layers) are each n-type doped. The thickness of each layer of silicon and silicon germanium is roughly 100 Å.

A first encapsulating layer 43 of silicon nitride (or alternatively silicon dioxide) may be positioned on a top side of the plurality of alternating layers of silicon and silicon germanium on opposite sides of the active region 40 (e.g., at the first side 36 and at the second side 38). A second encapsulating layer 45 of silicon nitride (or alternatively silicon dioxide) is positioned below the plurality of alternating layers of silicon and silicon germanium at the first side 36 and at the second side 38. The second encapsulating layer may be 300 Å. With the implementation shown in FIG. 5, the absorber 12 is in a suspended state with respect to the substrate 16. The first and the second encapsulation layers 43, 45 stress compensate the plurality of silicon layers and the plurality of silicon germanium layers. This concept is discussed in detail in connection with the '293 application.

As shown in FIG. 5, each of the plurality of alternating layers 42, 44 generally extend in a first plane (e.g., the alternating layers 42, 44 extend horizontally as shown in FIG. 5). A top layer 51 of silicon extends in the first plane and a layer of silicon germanium positioned thereunder extends in the first plane farther than that of the top layer 50 of silicon such that at least a portion 52 of the silicon germanium is exposed. This pattern is carried through from the top layer 51 of silicon down to the last layer of silicon germanium such that portions of the silicon and the silicon germanium layers are exposed to receive conductive electrical material.

To produce the exposed layers of silicon and silicon germanium, such layers are etched to enable a corresponding layer positioned under the etched layer to be exposed. For example, the top layer 51 of silicon is etched to enable the at least the portion 52 of the silicon germanium layer to be exposed with a mask/etching process such as a binary mask process. One example of a binary mask process is disclosed in U.S. Pat. No. 4,895,790 to Swanson et al. This process may be performed on one or more layers of the superlattice quantum well material such that each corresponding layer positioned below a particular layer is exposed to enable increased conductivity from the second side 38 to the first side 36 while the absorber 12 detects the IR radiation from a scene. A gap 47 is formed between the p-type layers of silicon and silicon germanium and the n-type p-type layers of silicon and silicon germanium in the active region 40. The exposed layers of the superlattice quantum well materials may have a layer of titanium positioned thereon. By applying a thin metal film such as titanium at a correct thickness, roughly a 50% absorption may be realized. When combined with a mirror (not shown) with the detector 10, absorption may be even greater but within a restricted wavelength region due to resonant absorption. Without the mirror, the thin metal film may absorb all wavelengths equally at 50%. When the etching process is complete, the etched layers of silicon and silicon germanium define a cavity 54 within the absorber 12 for receiving an electrically conductive material such as titanium, chromium, and/or aluminum to connect the p-type layers of silicon and silicon germanium and the n-type layers of silicon and silicon germanium.

By providing layers of the silicon and the silicon germanium to be exposed, this condition enables more surface area of the superlattice quantum well materials to come into contact with the conductive material. In general, the electrical resistance of the detector 10 affects the overall signal to noise ratio of the electrical output provided by the detector 10 while absorbing IR. By increasing electrical conductivity (i.e., decreasing electrical resistance), a high signal to noise ratio may be realized which may provide for a high fidelity representation of the amount of IR radiation sensed by the absorber 12.

FIG. 6 depicts a cross sectional view of the first arm 14 and the post 22 of the detector 10 in accordance to one embodiment of the present invention. As noted above in connection with FIG. 1, the first arm 14 and the post 22 may be electrically coupled to the first side 18 of the absorber 12. It is recognized that the various aspects discussed in connection with the first arm 14 hereafter also applies to the second arm 15.

In a similar manner discussed above in connection with FIG. 5, one or more corresponding layers of silicon and silicon germanium are etched to enable a corresponding layer positioned directly below to be exposed via a mask/etching process (e.g., binary mask operation). Again, by exposing the various layers of silicon and silicon germanium, increased electrical conductivity may be prevalent at the arm 14.

When the etching process is complete, the etched layers of silicon and silicon germanium define the gap 47 within the arm 14 for receiving a first electrically conductive material such as titanium (or chromium) and for receiving a second electrical conductive material such as aluminum. The post 22 may be formed with aluminum. The post 22 establishes contact with the interconnect pad 24 on the ROIC 19, which may be formed of titanium and aluminum. The post 22 provides structural support and establishes an electrical connection between the detector 10 and the ROIC 19. In general, the electrical resistance of the detector 10 affects the overall signal to noise ratio due to the Johnson noise generated from the resistance value of each arm. By fabricating a thermopile (or detector 10) with minimal electrical resistance, high sensitivity may be achieved with the exposed layers of the superlattice quantum well material. If the electrical resistance of the arm 14 is low, then the detector 10 may operate at a thermal fluctuation limit. In general, the main source of noise in the detector 10 may be due to heat sloshing up and down the arms 14, 15 randomly when the detector 10 is at a thermal fluctuation limit. If the resistance is too high, then the noise generated form the electrical resistance could dominate. The thermal fluctuation noise is generally a quantum mechanical lower noise limit.

FIG. 6 also depicts that the first encapsulation layer 43 (either silicon nitride or silicon dioxide) and that the second encapsulation layer 45 (either silicon nitride or silicon dioxide) sandwich the plurality of alternating layers of the superlattice quantum well materials (e.g., the layers of silicon and silicon germanium). The thickness of the second encapsulation layer 43 may be approximately 300 Å. The overall thickness of the plurality of alternating layers of the superlattice quantum well materials for both the absorber 12 and arms 14, 15 may be 900 Å. In one example, if each layer of silicon and silicon germanium is 100 Å thick, such a condition indicates that there is five layers of silicon and four layers of silicon germanium in the superlattice quantum well structure. In general, the conducting layers, such as the layers of the silicon germanium, may be needed for subsequent electrical connection. In general, FIG. 6 also depicts layers of superlattice quantum well materials extending in a first plane such that the layers extend at various lengths with respect to one another in the first plane to allow such layers to be exposed.

Since in this example, there are four layers of silicon germanium that are used, a binary masking process with a three mask etching process can be implemented to expose these four layers of silicon germanium (in addition to 4 layers of silicon). The amount of area that is to be exposed for each layer of silicon or silicon germanium may be adjusted or selected by a layering operation. In addition to the binary mask approach, a gray-scale lithography technique may also be used to expose the layers of silicon and silicon germanium. A layer of titanium may be positioned over the exposed region of the silicon and the silicon germanium. The post 22 may comprise a layer of aluminum and a portion of the titanium.

As noted above, each layer of silicon germanium in the absorber 12 and/or in the arm 14, 15 may be n or p-type doped. The Si layers may not be doped and therefore are not electrically conductive. It is recognized that the doping concentration of one or more layers of the silicon germanium is roughly between 5×10̂18 to 5×10{circle around ( )}19 atoms/cm̂3. The doping concentration may not be the same for the n-type and p-type. The electrical resistance of the n-type arm (e.g., the second arm 15) and the p-type arm (e.g., the first arm 14) should be the same to maximize the Seebeck effect this is why the doping concentration of the various layers of silicon germanium is different as it may be adjusted to achieve equivalent arm resistance. Moreover, as the doping concentration moves up, the electrical resistance goes down, but the Seebeck effect also goes down. The optimal doping concentration for the layer of silicon germanium is achieved to ensure that the electrical resistance is the same between the n-type and p-type arm and, moreover, to achieve maximum signal to noise ratio.

FIG. 7 depicts various operations used in connection with a binary mask etch cycle to expose layers of superlattice quantum well structure of the detector 10 in accordance to one embodiment of the present invention. As noted above, in one example, it may be advantageous to utilize four layers of silicon germanium for either the absorber 12 or the arm 14, 15 (or eight layers of silicon and silicon germanium). In view of the foregoing, the following binary mask etch cycle operations may be performed. Prior to the process being initiated, the plurality of alternating layers of the superlattice quantum well materials (e.g., the silicon and the silicon germanium layers) are formed into a block 50 having an overall width of 2.8 microns. It is recognized that the overall width may vary based on the desired criteria of a particular implementation. When the binary mask etch cycle operations are performed, a number of exposed layers of the silicon and the silicon germanium are produced. The number of exposed layers of silicon and silicon germanium is equal to 2^(N), where N is the number of photolithography masks. FIG. 7 depicts that the block 50 the superlattice quantum well materials 42 undergo 3 mask etch cycles to produce a total of 8 exposed layers of the superlattice quantum materials. It is recognized that any number of masks may be used to form the exposed layers of silicon and silicon germanium.

In operation 70, a first etch and mask cycle (e.g., N=1) is performed in which a first portion of the plurality of superlattice quantum well materials (e.g., the layers of silicon and silicon germanium) is etched from the block 50 leaving a first exposed layer 52 and a second exposed layer 54. The thickness of the first exposed layer may be 400 Å and the width of each of the first exposed layer and the second exposed layer may be 1.4 microns.

In operation 72, a second etch and mask cycle (e.g., N=2) is performed in which portions of the plurality of superlattice quantum well materials are etched from the block 50 leaving a total of four exposed layers (e.g., the first exposed layer 52, the second exposed layer 54, a third exposed layer 56, and a fourth exposed layer 58). The overall thickness of the first exposed layer 52, the second exposed layer 54, and the third exposed layer 56 may be 200 Å for each exposed layer, providing a total thickness of 600 Å. Each exposed layer has a width of 0.7 microns.

In operation 74, a third etch and mask cycle (e.g., N=3) is performed in which portions of the plurality of superlattice quantum well materials are etched from the block 50 leaving a total of eight exposed layers (e.g., the first exposed layer 52, the second exposed layer 54, the third exposed layer 56, the fourth exposed layer 58, a fifth exposed layer 60, a sixth exposed layer 62, a seventh exposed layer 64, and a eight exposed layer 66). The thickness for each exposed layer is 100 Å. Each exposed layer has a width of 0.35 microns.

FIG. 10 depicts a process flow 100 for forming the detector 10 in accordance to one embodiment of the present invention.

In operation 102, a layer of silicon dioxide is formed.

In operation 104, titanium is deposited.

In operation 106, aluminum is deposited.

In operation 108, aluminum and titanium are patterned to form reflector 17 and interconnects to the posts 22, 30.

In operation 110, polyimide is deposited.

In operation 112, a portion of the polyimide is removed to form one or more of the posts 22, 30.

In operation 114, a first low stress dielectric film (e.g., silicon nitride or silicon dioxide) is deposited.

In operation 116, first layers of silicon or silicon germanium are deposited.

In operation 118, a second low stress dielectric film (e.g., silicon nitride or silicon dioxide) is deposited over layers of silicon and silicon germanium and act as a dry etch stop and is patterns the layers.

In operation 120, the first arm 14 and the first portion 36 of the absorber 12 is formed by a dry etch.

In operation 122, the photoresist is removed and second layers of silicon or silicon germanium are deposited.

In operation 124, a third low stress dielectric film (e.g., silicon nitride or silicon dioxide) is deposited over the second layers of silicon and silicon germanium and are patterned to define the second arm 15 and second portion 38 of the absorber 12.

In operation 126, the second arm 15 and the second portion 38 of the absorber 12 is formed by way of dry etch.

In operation 128, a thin metal film of titanium or other suitable material is deposited over the absorber 12.

In operation 130 the various layers of silicon and silicon germanium are exposed in the areas of the post 22, 30 and the absorber 12 using either a binary mask dry etch process or grey scale mask dry etch process as discussed in connection with FIG. 7.

In operation 132, layers of the superlattice quantum well materials are removed down to a polyimide to form thermopile and arms.

In operation 134, layers of the superlattice quantum well materials and the polymide are removed in post receptors (e.g., pads on the ROIC 19 that receive the posts 22, 30) thereby exposing interconnects.

In operation 136, titanium and aluminum (e.g., conductive material) are deposited on post receptor areas and only titanium (i.e., conductive material) in absorber 12 interconnect area (or in active region 40).

In operation 138, the polyimide layer is removed with an oxygen plasma etch.

In operation 140, layer of aluminum is deposited on posts 22, 30.

While exemplary embodiments are described above, it is not intended that these embodiments describe all possible forms of the invention. Rather, the words used in the specification are words of description rather than limitation, and it is understood that various changes may be made without departing from the spirit and scope of the invention. Additionally, the features of various implementing embodiments may be combined to form further embodiments of the invention. 

1. An infrared (IR) detector comprising: a thermal sensing element including an absorber that is formed of a superlattice quantum well structure, the superlattice quantum well structure including: a first layer for extending in a first plane; and a second layer being positioned proximate to the first layer and extending in the first plane, wherein the second layer extends further than the first layer in the first plane such that a portion thereof is exposed for receiving a conductive electrical material to increase electrical conductivity in the detector.
 2. The detector of claim 1 wherein the first layer comprises silicon and the second layer comprises silicon germanium.
 3. The detector of claim 2 wherein the first layer of silicon and the second layer of silicon each has a thickness of generally 100 angstroms.
 4. The detector of claim 1 wherein the first layer is one of a plurality of barrier layers and the second layer is one of a plurality of conducting layers, each of the barrier layers and the conducting layers being arranged to alternate with one another.
 5. The detector of claim 4 wherein the plurality of barrier layers and the plurality of conducting layers has a total thickness of generally 1000 angstroms.
 6. The detector of claim 4 further comprising a first encapsulation layer and a second encapsulation layer, the plurality of barrier layers and the plurality of conductive layers being positioned between the first and the second encapsulation layers.
 7. The detector of claim 5 wherein each of the first and the second encapsulation layers comprise one of silicon nitride and silicon dioxide.
 8. The detector of claim 1 wherein the detector further comprises a first arm positioned on a first side of the absorber and a second arm positioned on a second side of the absorber, wherein the first arm and the second arm are each formed of the superlattice quantum well structure such that the absorber is thermally isolated by the first arm and the second arm.
 9. The detector of claim 8 wherein at least one of the first arm and the second arm includes a third layer for extending in the first plane and a fourth layer for extending in the first plane, the fourth layer being arranged to extend further in the first plane such that a portion thereof is exposed for receiving the conductive material to increase electrical conductivity with the absorber.
 10. The detector of claim 9 wherein the third layer comprises silicon and the fourth layer comprises silicon germanium.
 11. The detector of claim 10 wherein the silicon germanium is one of n-type doped and p-type doped, and wherein the doping concentration of the silicon germanium is between 5×10¹⁸ and 5×10¹⁹ atoms/cm³.
 12. An infrared (IR) detector comprising: a thermal sensing element including an absorber and an arm, the absorber being electrically connected to the arm, and each of the absorber and the arm including: a first layer for extending in a first plane; and a second layer being positioned proximate to the first layer and extending in the first plane, wherein the second layer extends further than the first layer in the first plane such that a portion thereof is exposed for receiving a conductive electrical material to increase electrical conductivity in the detector.
 13. The detector of claim 12 wherein the each of the absorber and the arm are formed of a superlattice quantum well material.
 14. The detector of claim 13 wherein the first layer comprises silicon and the second layers comprises silicon germanium.
 15. The detector of claim 14 wherein the first layer of silicon and the second layer of silicon germanium each has a thickness of generally 100 angstroms.
 16. The detector of claim 12 wherein the first layer is one of a plurality of barrier layers and the second layer is on a plurality of conducting layers, each of the barrier layers and the conducting layers being arranged to alternate with one another.
 17. The detector of claim 16 wherein the plurality of barrier layers and the plurality of conducting layers has a total thickness of generally 1000 angstroms.
 18. The detector of claim 16 further comprising a first encapsulation layer and a second encapsulation layer, the plurality of barrier layers and the plurality of conductive layers being positioned between the first and the second encapsulation layers.
 19. A method of forming an infrared (IR) detector, the method comprising: forming an absorber with at least one first layer and at least one second layer having a superlattice quantum well structure; and etching exposed sections in the at least one first layer and the at least one second layer with a binary mask operation such the exposed sections receive conductive electrical material to increase electrical conductivity in the detector.
 20. The method of claim 19 wherein a total number of exposed sections of the at least one first layer and the at least one second layer is equal to 2^(N), where N is the number of masks.
 21. The method of claim 19 wherein N is equal to 3 such that 8 exposed sections are formed. 